Adaptive Keeper
Adaptive Keeper Circuit to Control Domino Logic Dynamic Circuits Using Rate Sensing Techniques
Summary:
By controlling the leakage and contention current, the Adaptive Keeper Circuit maximizes the speed and stability of dynamic domino logic circuits surpassing the demands of today's circuit designers.
Application(s):
This technology fits into any industry that uses microprocessors or integrated chips, including computer, modems, mass storage, printers, automotive electronics (braking, power train), CD/DVD players, cell phones, and digital signal processing (DSP) devices.
Advantages/Benefits:
Background:
Dynamic domino logic has been plagued by two sources of errors: leakage current and contention current. The voltage at the output node determines the output of the circuit: a high voltage value gives a binary one, a zero voltage value gives a binary zero. The leakage current, caused by a quantum mechanical phenomenon, slowly reduces the output voltage, potentially causing a false result. The contention current an in-rush of current to the output node can hold the output node can hold the output node at an erroneous high voltage, again causing a false output.
Circuits are being made so small that the quantum phenomenon (known as quantum tunneling) causes leakage current, reducing the voltage at important nodes in circuits. This phenomenon is increased many fold in a domino logic due to having a large number of transistors (known as the NMOS pull down stack) connected to, and thus leaking current from, the output node. This invention provides a device that compensates for the reduced voltage caused by the leakage current. The invention also includes "Process Tracking," which provides close monitoring and tracking of the leakage current by means of a reference transistor. The reference transistor is configured in such a way as to mirror the state of the NMOS ppull down stack connected to the output node. By using the same NMOS transistors in the reference transistor and the NMOS pull down stack, the reference transistor can closely track the pull down stack leakage current (same NMOS, same leakage current).
Contention current is a very fast in-rush of current to the output node that can cause a false yet opposite result from the leakage current error. This is a problem when the NMOS pull down stack attempts to drop the output voltage to zero (ground). The contention current slows the rate at which the node goes to a zero voltage value, reducing the performance of the domino logic circuit. This is like emptying a bathtub of water at 5 gallons per minute, but leaving the faucet running at 1 gallon per minute. In essence contention current slows the dynamic logic ccircuit and potentially gives a false result.